About this podcast
In the world of semiconductor engineering, the path from architecture to silicon is rarely a straight line. Wearing Flip-Flops is a podcast dedicated to the people that love hardware, engineers, architects, and leaders navigating the challenges of modern SOC (System-on-Chip) verification.
Hosted by industry veteran Ronen Laviv, the show strips away the corporate jargon to have honest, high-level technical conversations about EDA tools, simulation platforms, and the verification bottlenecks that keep R&D teams up at night. Whether we’re discussing the latest in hardware-assisted verification or the unique culture of lean startup teams, we keep it grounded, insightful, and true to our name completely informal.
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If you’re looking for a technical deep dive without the stiff suit-and-tie atmosphere, grab your flip-flops and join us.
Episodes
- Probably Proven · 46 min · Season 1 Episode 14Formal verification gives you a mathematical yes or no. A large language model gives you its best guess. What happens when the LLM writes the properties and drives the proof?…
- Who Signs The Tapeout ? · 1 h 1 min · Season 1 Episode 13When an AI agent designs and verifies the chip, and a human signs the tapeout, who owns the bug that reaches silicon? Prof. Ziyad Hanna, Corporate Vice President of R&D and…
- The Tools, The Bill, and the jobs · 34 min · Season 1 Episode 12An AI agent built a complete RISC-V core in 12 hours. So why can't it tape out your SoC yet? Tzviel Lemberger from Google is back to separate the breakthrough from the hype…
- Googler in Flip-Flops · 40 min · Season 1 Episode 11Why do AI chip-design demos look amazing and then stall before production? Tzviel Lemberger, who leads AI activities in Google's Silicon Hardware group, has seen enough of them…
- The Death Of The Waveform Viewer · 46 min · Season 1 Episode 10Nobody enjoys opening a waveform viewer at 11pm. So here's the question this episode starts with: if AI reads the simulation database directly and does the root cause analysis…
- Who owns the AI chip design stack? · 28 min · Season 1 Episode 9Joining us for a post-DAC debrief, Sirish (CTO of Mooreslab.ai) breaks down the evolving role of AI in chip design. We explore who controls the AI chip design stack, how big EDA…
- AI in verification, build vs buy · 33 min · Season 1 Episode 8In episode 8 we host Sirish Kumar Munipalli, Co-Founder and CTO of MooresLabAI, an AI company building agentic automation for chip design verification and debug. What we cover…
- Emulation in Flip Flops (Part 2) · 25 min · Season 1 Episode 7Simulation runtime stops scaling long before your gate count does. Somewhere past a few hundred million gates, the weekend regression becomes the critical path, and the decision…
- Emulation in Flip Flops (Part 1) · 30 min · Season 1 Episode 6Simulation runtime stops scaling long before your gate count does. Somewhere past a few hundred million gates, the weekend regression becomes the critical path, and the decision…
- Silicon Valley, Taiwan Alley · 1 h 12 min · Season 1 Episode 5Where the chip supply chain quietly breaks: the Taiwan question, espionage that needs no invasion, and a single dutch point of failure.
- The Winner Loses · 42 min · Season 1 Episode 4Are we paying a massive "productivity tax" on today’s complex SOC verification just because the industry chose UVM over Specman ? Look down at your keyboard. The only reason it…
- The Hyperscale Playbook (Part 2) · 31 min · Season 1 Episode 3We’re jumping back in for part two of the SOC Hyperscale playbook with Claudio to see how 26 years of experience at Amazon translates to the high-stakes world of silicon…
- The Hyperscale Playbook (Part 1) · 30 min · Season 1 Episode 2Chip design verification isn't just about finding bugs, it's about managing massive-scale risk. Today, we’re hosting Claudio, Verification Manager for Amazon’s Graviton team, to…
- Introduction - Hitting the Verification Wall · 16 min · Season 1 Episode 1In this first episode, meet the hosts and dive into one of the biggest problems that the hardware industry is facing
